FPGA Pre-Silicon Validation

Overview

FPGA pre-silicon validation is the practice of running OCP and FTP test suites against an FPGA board that emulates an early ASIC, so protocol and conformance issues can be caught before silicon is available — i.e., before tape-out. Sanblaze platforms include an AIC slot to wire in a PCIe FPGA board for exactly this purpose. The economic case is strong: customers using the capability save themselves a couple of ASIC tape-outs per year, each costing over a million dollars in respins.