Chiplet Design

Overview

Chiplet design is a semiconductor approach that decomposes a chip into multiple smaller dies ("chiplets") assembled into a single package using advanced interposer and packaging technologies (2.5D, 3D) and connected by high-speed die-to-die (D2D) interconnects such as UCIe. Unlike monolithic chip designs, chiplets allow system designers to mix and match compute, I/O, memory controller, and accelerator dies from different process nodes and foundries, enabling greater flexibility and modularity.

For AI chip development, chiplet design addresses the mismatch between rapid AI requirements evolution and the long cycle times of full-chip development. By building from modular building-block dice, new configurations can be composed without additional mask costs — a single chiplet can serve as the base for multiple product SKUs. Rebellions' REBEL-Q exemplifies this: four REBEL_H NPU dice plus four HBM3E stacks on an ICube-S interposer, and the same NPU die can be combined with REBEL-IO (I/O die), REBEL-MEM (memory die), or REBEL-CPU (CPU die) for different product configurations.