Strategies to Boost Switch Programming
Author: Srikishen Shanmugam, Kishore Gummadidala & Runming Wu, Software Engineers, Google Collection: 2023 Global Summit - Networking
Summary
Google presents a systematic analysis of route programming performance bottlenecks in their PINS (P4 Integrated Network Switch) stack and the strategies they employed to achieve an 8x improvement for link-down convergence and 16x improvement for link-up convergence. The work addresses the speed gap between Google's native tightly-coupled switch stack (which provides high-speed route programming) and the modular PINS stack built on SAI, P4Runtime, and SONiC components, which originally suffered from significantly lower programming speed despite its superior modularity and feature richness.
The optimization strategies span three layers. At the SAI layer, Google proposes a new next-hop group type that allows the application to specify the final member list and weights in a single bulk-set operation, eliminating the current three-step process (delete stale members, modify common members, add new members) that leaves the group in a transitory suboptimal state. They also extended bulk support to additional SAI objects including router interfaces and next-hop groups. At the orchestration layer (OrchAgent/SWSS), they reduced Redis DB transactions by implementing bulk ID allocation, moving hardware-map DB writes to background threads, and freeing the main thread from blocking operations. At the application layer (P4RT), they replaced the ProducerStateTable IPC mechanism (which required 5 Redis operations per request) with a direct ZMQ-like notification channel that consolidates multiple requests into a single IPC message, with DB writes moved to a background thread. They also added an in-process cache for P4RT tables to eliminate DB reads for RPC validation.
The team used layer-wise performance breakdown and flame-graph profiling to identify bottlenecks, combined with rapid prototyping to validate whether proposed optimizations were worth pursuing before full implementation.
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