Chiplets at Scale: How Arm And OCP Are Powering The Next Wave of Modular Innovation

Author: Mark Minet, Infrastructure Line of Business, Arm Collection: 2025 OCP Global Summit - Expo Hall Sessions

Summary

Arm presents its strategy for accelerating multi-party chiplet development through the Arm Total Design (ATD) program, now grown to 36 active partners (from 12 at launch two years ago), and announces the contribution of a Foundational Chiplet System Architecture (FCSA) specification to OCP. The core thesis is that AI workloads create power demands that cannot be met without a transformation in infrastructure design, and chiplets enable disaggregated systems that avoid PCB-level delays and power losses. The current chiplet landscape is dominated by end-to-end proprietary designs (Amazon, NVIDIA), but the next wave will involve multi-party designs requiring interoperability standards.

The ATD program has expanded to include companion silicon partners (Astera Labs, Credo, Eliyan, Rebellions) whose chiplets connect to Arm compute chiplets, enabling collaborative standard development. The Arm Chiplet System Architecture (CSA) focuses on Arm-led specifications using the Arm CHI interface, while the newly announced FCSA extracts a foundational, architecture-neutral specification contributed to OCP for community-driven development. Key demonstrations include: Rebellions' 10-chiplet AI SoC (2 Arm Neoverse compute chiplets + 4 NPUs + 4 HBM, with Samsung and AD Technologies), Alphor's 64-core Neoverse V3 chiplet CPU (scalable to 128 cores via chiplet pairing), and Novatech's N2 CSS test chip with UCIe die-to-die interface connecting to HBM and fiber.